(Received: 1-Sep.-2020, Revised: 16-Oct.-2020 , Accepted: 5-Nov.-2020)

Quantum-dot Cellular Automata (QCA) is an innovative technology in the nano-scale for changing the CMOS
revolution with an alternative one. It provides some benefits in reversible logic, like competitive power
consumption and feature size. Therefore, much attention is paid to producing different reversible circuits using
that technique. This paper presents a superior model for a reversible Feynman gate-based odd parity generator
and checker. The proposed model can be utilized for loss bit detection /checking in telecommunication systems.
The circuit verification is carried out using the QCADesigner tool. The proposed Feynman gate provides an
improvement of 50% and 48% in terms of latency and cost, respectively. The parity generator, parity checker and
nano-communication circuit have complexity reduction by 25%, 37% and 24%, respectively, in terms of requiring
cells.

[1] G. E. Moore, "Cramming More Components onto Integrated Circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp.114 ff," IEEE Solid-state Circuits Society Newsletter, vol. 11, no. 3, pp. 33-35, 2006.

[2] C. S. Lent et al., "Quantum Cellular Automata," Nanotechnology, vol. 4, pp. 49-57, 1993.

[3] H. Rashidi and A. Rezai, "High-performance Full Adder Architecture in Quantum-dot Cellular Automata," The Journal of Engineering, vol. 2017, pp. 394-402, 2017.

[4] Ali H. Majeed, E. AlKaldy, M. S. B. Zainal and Danial B. M. D. Nor, "A New 5-input Majority Gate without Adjacent Inputs Crosstalk Effect in QCA Technology," Indonesian Journal of Electrical Engineering and Computer Science, vol. 14, pp. 1159-1164, 2019.

[5] M. Ali Hussien, Z. Moh'd Shamian and A. Esam, "Quantum-dot Cellular Automata: Review Paper," International Journal of Integrated Engineering, vol. 11, no. 8, pp. 143-158, 2019.

[6] A. N. Bahar, F. Ahmad, N. M. Nahid, M. Kamrul Hassan, M. Abdullah Al-Shafi and K. Ahmed, "An Optimal Design of Conservative Efficient Reversible Parity Logic Circuits Using QCA," International Journal of Information Technology, vol. 11, pp. 785-794, DOI: 10.1007/s41870-018-0226-9, 2018.

[7] K. Walus, T. J. Dysart, G. A. Jullien and R. A. Budiman, "QCADesigner: A Rapid Design and Simulation Tool for Quantum-dot Cellular Automata," IEEE Trans. on Nanotechnology, vol. 3, pp. 26-31, 2004.

[8] A. H. Majeed, B. Salih, M. S. bin Zainal and D. Bin Md Nor, "Power Efficient Optimal Structure CAM- cell in QCA Technology," Indian Journal of Science and Technology, vol. 12, no. 37, pp. 1-6, 2019.

[9] I. Edrisi Arani and A. Rezai, "Novel Circuit Design of Serial–Parallel Multiplier in Quantum-dot Cellular Automata Technology," Journal of Computational Electronics, vol. 17, pp. 1771-1779, 2018.

[10] A. Majeed, E. AlKaldy and S. Albermany, "An Energy-efficient RAM Cell Based on Novel Majority Gate in QCA Technology," SN Applied Sciences, vol. 1, A., no. 1354, pp. 1-8, 2019.

[11] K.-M. Qiu and Y.-S. Xia, "Quantum-dots Cellular Automata Comparator," Proc. of the 7th International Conference on ASIC, 2007, pp. 1297-1300, Guilin, China, 2007.

[12] A. H. Majeed, E. Alkaldy, M. S. bin Zainal and D. Bin Md Nor, "Synchronous Counter Design Using Novel Level Sensitive T-FF in QCA Technology," Journal of Low Power Electronics and Applications, vol. 9, no. 3, pp. 1-13, 2019.

[13] M. Divshali, A. Rezai and S. Hamidpour, "Design of Novel Coplanar Counter Circuit in Quantum Dot Cellular Automata Technology," Int. Journal of Theoretical Physics, vol. 58, pp. 2677-2691, 2019.

[14] M. B. Khosroshahy, M. H. Moaiyeri, K. Navi and N. Bagherzadeh, "An Energy and Cost Efficient Majority-based RAM Cell in Quantum-dot Cellular Automata," Results in Physics, vol. 7, pp. 3543-3551, 2017.

[15] A. H. Majeed, M. S. B. Zainal, E. Alkaldy and D. M. Nor, "Full Adder Circuit Design with Novel Lower Complexity XOR Gate in QCA Technology," Transactions on Electrical and Electronic Materials, vol. 21, pp. 198-207, 2020.

[16] S. Azimi, S. Angizi and M. Moaiyeri, "Efficient and Robust SRAM Cell Design Based on Quantum-dot Cellular Automata," ECS Journal of Solid State Science and Technology, vol. 7, pp. Q38-Q45, 2018.

[17] M. N. Divshali, A. Rezai and A. Karimi, "Towards Multilayer QCA SISO Shift Register Based on Efficient D-FF Circuits," International Journal of Theoretical Physics, vol. 57, pp. 3326-3339, 2018.

[18] M. A. Tehrani, K. Navi and A. Kia-Kojoori, "Multi-output Majority Gate-based Design Optimization by Using Evolutionary Algorithm," Swarm and Evolutionary Computation, vol. 10, pp. 25-30, 2013.

[19] R. Zhang, P. Gupta and N. K. Jha, "Majority and Minority Network Synthesis with Application to QCA- SET- and TPL-based Nanotechnologies," IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, vol. 26, pp. 1233-1245, 2007.

[20] M. R. Bonyadi, S. M. R. Azghadi, N. M. Rad, K. Navi and E. Afjei, "Logic Optimization for Majority Gate-based Nanoelectronic Circuits Based on Genetic Algorithm," Proc. of the IEEE 2007 International Conference on Electrical Engineering, pp. 1-5, Lahore, Pakistan, 2007.

[21] M. Bagherian Khosroshahy, M. Hossein Moaiyeri and K. Navi, Design and Evaluation of a 5-input Majority Gate-based Content-addressable Memory Cell in Quantum-dot Cellular Automata, Proc. of the 19th IEEE International Symposium on Computer Architecture and Digital Systems (CADS), DOI: 10.1109/CADS.2017.8310671, Kish Island, Iran, 2017.

[22] H. Majeed Ali, E. Alkaldy, S. Zainal Mohd, K. Navi and D. Nor, "Optimal Design of RAM Cell Using Novel 2:1 Multiplexer in QCA Technology," Circuit World, vol. 46, pp. 147-158, 2019.

[23] M. Ali Hussien, Z. Mohd Shamian, A. Esam and N. Danial Md, "A Content-addressable Memory Structure Using Novel Majority Gate with 5-input in Quantum-dot Cellular Automata," International Journal of Integrated Engineering, vol. 12, no. 4, pp. 28-38, 2020.

[24] H. Rashidi, A. Rezai and S. Soltany, "High-performance Multiplexer Architecture for Quantum-dot Cellular Automata," Journal of Computational Electronics, vol. 15, pp. 968-981, 2016.

[25] F. Ahmad, G. M. Bhat and P. Z. Ahmad, "Novel Adder Circuits Based on Quantum-dot Cellular Automata (QCA)," Circuits and Systems, vol. 05, pp. 142-152, 2014.

[26] E. Alkaldy, A. H. Majeed, M. S. bin Zainal and D. Bin Md Nor, "Optimum Multiplexer Design in 50 "Quantum-dot Cellular Automata-based Superior Design of Conservative Reversible Parity Logic Circuits," Indonesian Journal of Electrical Engineering and Computer Science, vol. 17, pp. 148-155, 2020.

[27] H. Chen, H. Lv, Z. Zhang, X. Cheng and G. Xie, "Design and Analysis of a Novel Low-power Exclusive- OR Gate Based on Quantum-dot Cellular Automata," Journal of Circuits, Systems and Computers, vol. 28, no. 8, p. 1950141, 2019.

[28] M. M. Abutaleb, "A Unique Cell-based Configuration of XOR Gates in Quantum-dot Cellular Automata Nanotechnology," Proc. of the 2019 IEEE International Conference on Sensors and Nanotechnology, pp. 1-4, Penang, Malaysia, 2019.

[29] E. Taherkhani, M. H. Moaiyeri and S. Angizi, "Design of an Ultra-efficient Reversible Full Adder- subtractor in Quantum-dot Cellular Automata," Optik - International Journal for Light and Electron Optics, vol. 142, pp. 557-563, 2017.

[30] S. Srivastava, A. Asthana, S. Bhanja and S. Sarkar, "QCAPro: An Error-power Estimation Tool for QCA Circuit Design," Proc. of the 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011, pp. 2377-2380, Rio de Janeiro, Brazil, 2011.

[31] D. Bahrepour and N. Maroufi, "A 2-bit Full Comparator Design with Minimum Quantum Cost Function in Quantum-dot Cellular Automata," Journal of Information Systems and Telecommunication (JIST), vol. 6, pp. 197-203, 2018.

[32] B. Debnath, J. C. Das, D. De, F. Ghaemi, A. Ahmadian and N. Senu, "Reversible Palm Vein Authenticator Design with Quantum Dot Cellular Automata for Information Security in Nanocommunication Network," IEEE Access, vol. 8, pp. 174821-174832, 2020.

[33] J. C. Das and D. De, "Quantum-dot Cellular Automata Based Reversible Low Power Parity Generator and Parity Checker Design for Nanocommunication," Frontiers of Information Technology & Electronic Engineering, vol. 17, pp. 224-236, 2016.

[34] P. Biswas, N. Gupta and N. Patidar, "Basic Reversible Logic Gates and It’s QCA Implementation," Int. Journal of Engineering Research and Applications, vol. 4, no. 6, pp. 12-16, 2014.

[35] J. C. Das and D. De, "Reversible Binary to Grey and Grey to Binary Code Converter Using QCA," IETE Journal of Research, vol. 61, pp. 223-229, 2015.

[36] M. Abdullah Al-Shafi, M. S. Islam and A. N. Bahar, "A Review on Reversible Logic Gates and It’s QCA Implementation," Int. Journal of Computer Applications, vol. 128, no. 2, pp. 27-34, 2015.

[37] A. N. Bahar, S. Waheed and M. A. Habib, "A Novel Presentation of Reversible Logic Gate in Quantum- dot Cellular Automata (QCA)," Proc. of the 2014 IEEE International Conference on Electrical Engineering and Information & Communication Technology, 2014, pp. 1-6, Dhaka, Bangladesh, 2014.

[38] M. M. Abutaleb, "Robust and Efficient QCA Cell-based Nanostructures of Elementary Reversible Logic Gates," The Journal of Supercomputing, vol. 74, pp. 6258-6274, 2018.